Assessing The Connectivity of Nano-Scale Processing Elements In Self-Assembled Networks

  IJPTT-book-cover
 
International Journal of P2P Network Trends and Technology (IJPTT)          
 
© 2019 by IJPTT Journal
Volume-9 Issue-4
Year of Publication : 2019
Authors : Dr.I.Lakshmi

Citation

MLA Style: Dr.I.Lakshmi "Assessing The Connectivity of Nano-Scale Processing Elements In Self-Assembled Networks" International Journal of P2P Network Trends and Technology 9.4 (2019): 7-14.

APA Style:Dr.I.Lakshmi(2019). Assessing The Connectivity of Nano-Scale Processing Elements In Self-Assembled Networks. International Journal of P2P Network Trends and Technology, 9(4), 7-14.

Abstract

Models developed utilizing base self-get together of nanoelectronic gadgets should endure deformity rates that are requests of size higher than those found in current CMOS innovations. In this paper, we portray and assess a way to deal with give imperfection detachment in such architecture, to the point that comprises of countless computational hubs, each of which can speak with four neighbours on single-piece offbeat connections. Our methodology does not require an outer deformity map, nor does it require redundancy of complex computational circuits, both of which will restrain the versatility of the framework. We utilize the converse way sending show directing calculation, usually utilized as a part of wide-zone systems, to outline inadequate hubs at start-up. The calculation ensures two things (a) the telecast eventually ends and (b) every single useful hub that have a way to the show source will get it. In this manner, all functional and reachable hubs are associated through a broadcast tree, bringing about imperfection disengagement. Reproductions demonstrate that, for a come up short stop model of hub disappointment, the show associates all hubs that are reachable from the source. If there should arise an occurrence of low surrender rates (? 10%), the show achieves more than 97% of non-faulty hubs. For a system of hubs as a network, our outcomes demonstrate that, by and large, the time taken to finish the telecast is relative to the square foundation of the quantity of hubs in the framework. At last, we likewise display an investigation of the attributes of the trees produced by our show system.

References

[1] Bachtold, P. Hadley, T. Nakanishi, and C. Dekker. Logic Circuits with Carbon Nanotube Transistors. Science, 294:1317–1320, November 2001.
[2] E. Braun, Y. Eichen, U. Sivan, and G. Ben-Yoseph. DNA-Templated Assembly and Electrode Attachment of a Conducting Silver Wire. Nature, 391:775–778, 1998.
[3] Y. Cui and C. M. Lieber. Functional Nanoscale Electronic Devices Assembled Using Silicon Nanowire Building Blocks. Science, 291:851–853, February 2001.
[4] W. B. Culbertson, R. Amerson, R. J. Carter, P. Kuekes, and G. Snider. The Teramac Custom Computer: Extending the Limits with Defect Tolerance. In Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, November 1996.
[5] Y. K. Dalal and R. M. Metcalfe. Reverse Path Forwarding of Broadcast Packets. Communications of the ACM, 21(12):1040– 1048, 1978. A. DeHon. Array-Based Architecture for Molecular Electronics. In Proceedings of the First Workshop on Non- Silicon Computation (NSC-1), February 2002.
[6] S. C. Goldstein and M. Budiu. NanoFabrics: Spatial Computing Using Molecular Electronics. In Proceedings of the 28th Annual International Symposium on Computer Architecture, pages 178–191, July 2001.
[7] J. Han and P. Jonker. A Defect- and Fault-Tolerant Architecture for Nanocomputers. Nanotechnology, 14:224– 230, January 2003.
[8] J. R. Heath, P. J. Kuekes, G . S. Snider, and R. S. Williams. A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology. Science, 280:1716–1721, June 1998.
[9] Y. Huang, X. Duan, Y. Cui, L. J. Lauhon, K. Kim, and C. M. Lieber. Logic Gates and Computation from Assembled Nanowire Building Blocks. Science, 294:1313–1317, November 2001.
[10] Intanagonwiwat, R. Govindan, and D. Estrin. Directed Diffusion: A Scalable and Robust Communication Paradigm for Sensor Networks. In Mobile Computing and Networking, pages 56–67, 2000.
[11] International Technology Roadmap for Semiconductors, 2003.
[12] K. Keren, R. S. Berman, E. Buchstab, U. Sivan, and E. Braun. DNA-Templated Carbon Nanotube Field-Effect Transistor. Science, 302:1380–1382, November 2003.
[13] R. A. Kiehl, K. Musier-Forsyth, N. C. Seeman, B. I. Shklovskii, and T. Andrew Taton. Assembly of Nanoelectronic Components by DNA Scaffolding. In Proceedings of the NSF Nanoscale Science and Engineering Grantees Conference, December 2003.
[14] Liu, S-H. Park, J . H. Reif, and T.H. LaBean. DNA Nanotubes Self-assembled from TX Tiles as Templates for Conductive Nanowires. Proceedings of the National Academy of Science, 101(3):717–722, 2004.
[15] R.E. Lyons and W. Vanderkulk. The Use of Triple-Modular Redundancy to Improve Computer Reliability. IBM Journal, pages 200–209, 1962.
[16] B. R. Martin, D. J. Dermody, B. D. Reiss, M. Fang, L. A. Lyon, M . J. Natan, and T . E. Mallouk. Orthogonal Self-Assembly on Colloidal Gold-Platinum Nanorods. Advanced Materials, 11(12):1021–1025, August 1999.
[17] K. Nikolic, A. Sadek, and M. Forshaw. Fault-Tolerant Techniques for Nanocomputers. Nanotechnology, 13:357–362, 2002.
[18] J. P. Patwardhan, C. Dwyer, A. R. Lebeck, and D. J. Sorin. Circuit and System Architecture for DNA-Guided Self- Assembly of Nanoelectronics. In Foundations of Nanoscience: Self-Assembled Architectures and Devices, pages 344–358, April 2004.
[19] N.C. Seeman. DNA Engineering and its Application to Nanotechnology. Trends in Biotech, 17:437–443, 1999.
[20] S.J. Tans, A.R.M. Verschueren, and C. Dekker. Room-temperature Transistor Based on a Single Carbon Nanotube. Nature, 393:49–52, 1998.
[21] L. Tennenhouse and D. J. Wetherall. Towards an Active Network Architecture. Computer Communication Review, 26(2), 1996.
[22] J. M. Tour. Molecular Electronics. Synthesis and Testing of Components. Accounts of Chemical Research, 33(11):791– 804, 2000.
[23] J. von Neumann. Probabilistic Logics and the Synthesis of Reliable Organisms from Unreliable Components. In C. E. Shannon and J. McCarthy, editors, Automata Studies, pages 43–98. Princeton University Press, Princeton, NJ, 1956.
[24] H. Yan, S. H. Park, L. Feng, G. Finkelstein, J. H. Reif, and T. H. LaBean. 4x4 DNA Tile and Lattices: Characterization, Self-Assembly, and Metallization of a Novel DNA Nanostructure Motif. In Proceedings of the Ninth International Meeting on DNA Based Computers (DNA9), June 2003.
[25] H. Yan, S. H. Park, G. Finkelstein, J. H. Reif, and Thomas H. LaBean. DNA Templated Self-Assembly of Protein Arrays and Highly Conductive Nanowires. Science, 301(5641):1882– 1884, September 2003.

Keywords
Nano-Scale Processing Elements ,Self-Assembled Networks